1. Field
The following description relates to a semiconductor device in a level shifter with an electrostatic discharge protection circuit and semiconductor chip to protect a thin gate oxide of the semiconductor device from an Electrostatic Discharge (hereinafter referred to as “ESD”) stress.
2. Description of Related Art
A level shifter refers to a circuit configured to change a voltage level of a semiconductor chip interior like a Display Drive IC (DDI). For example, the level shifter converts a low voltage signal to a middle or high voltage signal. Thus, the level shifter is positioned between multiple power supply lines with high and low power input.
A semiconductor device in a level shifter is placed in a level shifter block that may not provide enough driving current because a gate input voltage is a low voltage. This is because there is a limit in increasing a driving current since a thick gate insulating layer is used.
Accordingly, a semiconductor device in a level shifter with a thin gate insulating layer may be used but such semiconductor device in a level shifter is vulnerable to an ESD stress. Because, when ESD stress or Electrical Over-Stress (hereinafter referred to as “EOS”) is applied to the semiconductor device in a level shifter, a thin gate insulating layer is easily destroyed. Hence, an ESD protection circuit and device is necessary to prevent or block the ESD stress of a semiconductor device in a level shifter.